The favorite HDL language in Europe and in Universities
-
- Dijkstra
by surfwiles » Tue Jul 05, 2011 7:57 pm
- 0 Replies
- 10 Views
- Last post by surfwiles
Tue Jul 05, 2011 7:57 pm
-
- IF statement is not synthesizable ...
by ehbas » Thu Jun 30, 2011 8:38 pm
- 7 Replies
- 55 Views
- Last post by Case23
Tue Jul 05, 2011 10:58 am
-
- vhdl code for writing to LCD via UART
by skunk_rm » Thu Jun 23, 2011 12:37 pm
- 0 Replies
- 47 Views
- Last post by skunk_rm
Thu Jun 23, 2011 12:37 pm
-
- change with sums and shifts
by Hyuma » Wed Oct 13, 2010 8:07 pm
- 2 Replies
- 753 Views
- Last post by tricky
Thu Jun 16, 2011 2:28 pm
-
- Complexity of VHDL.
by hamster » Mon May 23, 2011 9:00 am
- 3 Replies
- 92 Views
- Last post by BroadcastGuy
Fri Jun 10, 2011 11:18 am
-
- Implementing a FSM in VHDL
by Rigby » Sat May 14, 2011 11:11 am
- 4 Replies
- 176 Views
- Last post by tricky
Thu May 26, 2011 9:40 pm
-
- Need help with serial transmission system project
by andyg » Tue May 24, 2011 1:51 pm
- 4 Replies
- 67 Views
- Last post by tricky
Wed May 25, 2011 2:00 pm
-
- sound generator
by mythrix » Sun May 22, 2011 7:14 pm
- 0 Replies
- 56 Views
- Last post by mythrix
Sun May 22, 2011 7:14 pm
-
- Explanation of coding
by knjr » Mon May 16, 2011 3:24 am
- 11 Replies
- 211 Views
- Last post by knjr
Fri May 20, 2011 5:27 am
-
- Coding for 8 bit counter
by knjr » Thu May 12, 2011 7:10 am
- 9 Replies
- 141 Views
- Last post by hamster
Mon May 16, 2011 8:10 am
-
- conversion for bit_vector to integer problem
by hastnagri » Fri May 13, 2011 12:00 pm
- 3 Replies
- 88 Views
- Last post by hastnagri
Fri May 13, 2011 1:34 pm
-
- alu design problem in model sim
by hastnagri » Sun May 08, 2011 5:58 am
- 3 Replies
- 109 Views
- Last post by tricky
Wed May 11, 2011 7:44 am
-
- problem: last state not being saved
by mmina » Mon May 02, 2011 4:01 pm
- 1 Replies
- 100 Views
- Last post by tricky
Wed May 04, 2011 3:54 pm
-
- matrix product
by google » Mon Apr 25, 2011 9:33 pm
- 1 Replies
- 101 Views
- Last post by hamster
Fri Apr 29, 2011 2:50 am
-
- error in component instantiation
by Guest » Wed Apr 13, 2011 7:48 pm
- 1 Replies
- 120 Views
- Last post by tricky
Fri Apr 15, 2011 10:07 am
-
- is it possible to connect instances without defining signals
by Guest » Sun Feb 06, 2011 12:10 am
- 2 Replies
- 458 Views
- Last post by heeckhau
Wed Apr 06, 2011 7:24 pm
-
- Stange logic gate error in VHDL - NAND and NOR - more then 2
by Guest » Tue Feb 22, 2011 5:11 pm
- 1 Replies
- 391 Views
- Last post by tricky
Thu Feb 24, 2011 8:28 am
-
- BCD counter vhdl code
by Guest » Tue Feb 01, 2011 5:11 am
- 3 Replies
- 583 Views
- Last post by vlado
Fri Feb 04, 2011 9:58 am
-
- QUIZ QUIZZZZ... some help here please?
by Guest » Sat Jan 29, 2011 8:12 pm
- 1 Replies
- 349 Views
- Last post by tricky
Sat Jan 29, 2011 10:12 pm
-
- Improvements for VHDL
by Guest » Sat Jan 22, 2011 3:41 pm
- 1 Replies
- 431 Views
- Last post by tricky
Mon Jan 24, 2011 3:29 pm
-
- urgent help VHDL code generate baud from 4MHz
by Guest » Wed Jan 19, 2011 3:12 pm
- 4 Replies
- 655 Views
- Last post by Thoma HAUC
Sat Jan 22, 2011 7:54 pm
-
- Use of signed and unsigned signals in ports
by Guest » Sat Dec 18, 2010 10:50 pm
- 7 Replies
- 2398 Views
- Last post by tricky
Fri Dec 24, 2010 10:05 pm
-
- What is the meaning of "." in VHDL
by jasonkee » Mon Dec 20, 2010 7:04 am
- 3 Replies
- 587 Views
- Last post by jasonkee
Tue Dec 21, 2010 8:50 am
-
- Unwanted FF/Latch trimming!!!
by Guest » Wed Dec 08, 2010 6:58 pm
- 4 Replies
- 782 Views
- Last post by tricky
Fri Dec 10, 2010 2:12 pm
-
- what's the difference between direct addition and structural
by Guest » Mon Nov 15, 2010 11:38 am
- 3 Replies
- 754 Views
- Last post by tricky
Thu Nov 18, 2010 3:38 pm
-
- Need help, Describing State Machine in VHDL
by Guest » Tue Nov 16, 2010 1:09 pm
- 1 Replies
- 588 Views
- Last post by tricky
Tue Nov 16, 2010 3:19 pm
-
- error in the testbench for my simple a full-adder(4bit)
by Guest » Sat Nov 13, 2010 2:01 pm
- 1 Replies
- 797 Views
- Last post by tricky
Tue Nov 16, 2010 10:04 am
-
- NEED help with 4-bit adder
by Chopic » Tue Oct 19, 2010 7:44 pm
- 1 Replies
- 730 Views
- Last post by vlado
Thu Nov 04, 2010 1:39 pm
-
- How Generally looks Like a VHDL code
by pc_magas » Tue Oct 26, 2010 6:54 pm
- 0 Replies
- 714 Views
- Last post by pc_magas
Tue Oct 26, 2010 6:54 pm
-
- VHDL modeling question
by baseball_man » Mon Oct 11, 2010 5:06 am
- 1 Replies
- 675 Views
- Last post by heeckhau
Tue Oct 12, 2010 12:24 pm
-
- switch not being read + led not lighting
by sentry » Sun Oct 10, 2010 9:37 pm
- 4 Replies
- 816 Views
- Last post by Case23
Mon Oct 11, 2010 10:46 am
-
- Issue with 12 bit counter.
by Nemi » Sun Oct 03, 2010 5:30 pm
- 5 Replies
- 953 Views
- Last post by tricky
Tue Oct 05, 2010 1:54 pm
-
- Design a circuit with VHDL, help again THX
by usbank » Mon Oct 04, 2010 1:40 am
- 0 Replies
- 802 Views
- Last post by usbank
Mon Oct 04, 2010 1:40 am
-
- Can you explain those VHDL codes to me?
by usbank » Sat Oct 02, 2010 12:22 pm
- 2 Replies
- 801 Views
- Last post by usbank
Sun Oct 03, 2010 10:47 pm
-
- Problem viewing waveforms using gtkwave
by mohitdaksh » Tue Sep 28, 2010 3:40 am
- 0 Replies
- 736 Views
- Last post by mohitdaksh
Tue Sep 28, 2010 3:40 am
-
- how to replace this fiction
by kain » Wed Sep 15, 2010 4:30 pm
- 1 Replies
- 789 Views
- Last post by tricky
Mon Sep 20, 2010 4:32 pm
-
- help me to thin my code
by kain » Tue Sep 14, 2010 3:12 pm
- 1 Replies
- 770 Views
- Last post by tricky
Mon Sep 20, 2010 4:31 pm
-
- Learn to Design with VHDL
by trickmasterpc » Fri Sep 17, 2010 11:24 pm
- 0 Replies
- 731 Views
- Last post by trickmasterpc
Fri Sep 17, 2010 11:24 pm
-
- Initialisation problem with 8 bit counter …
by michaels » Sat Sep 04, 2010 4:03 pm
- 9 Replies
- 1288 Views
- Last post by Case23
Mon Sep 13, 2010 8:08 am
-
- Need VHDL Help
by kantri » Fri Aug 27, 2010 1:07 am
- 3 Replies
- 967 Views
- Last post by tricky
Sat Aug 28, 2010 4:59 pm
-
- Newbee in VHDL
by Ruud » Sat Aug 14, 2010 9:37 am
- 0 Replies
- 966 Views
- Last post by Ruud
Sat Aug 14, 2010 9:37 am
-
- for loop and processes simple problem
by pupillo » Fri Aug 13, 2010 11:29 am
- 0 Replies
- 881 Views
- Last post by pupillo
Fri Aug 13, 2010 11:29 am
-
- how to do RTL generation using external inputs..
by sarathtm » Fri Aug 13, 2010 9:14 am
- 0 Replies
- 892 Views
- Last post by sarathtm
Fri Aug 13, 2010 9:14 am
-
- VHDL Help - ADC
by thyalmighty » Mon Aug 09, 2010 5:08 pm
- 2 Replies
- 1018 Views
- Last post by thyalmighty
Wed Aug 11, 2010 2:41 am
-
- shared signal design
by sinharo » Mon Aug 09, 2010 5:43 am
- 1 Replies
- 823 Views
- Last post by tricky
Mon Aug 09, 2010 7:53 am
-
- If Else using Generate statements
by johnmac » Sun Aug 01, 2010 7:59 pm
- 3 Replies
- 947 Views
- Last post by johnmac
Mon Aug 02, 2010 1:36 pm
-
- E1 Deframer Doubt
by dineshlohan » Fri Apr 09, 2010 10:51 am
- 3 Replies
- 1473 Views
- Last post by flakon
Wed Jul 28, 2010 5:59 pm
-
- Problems with fixed point numbers
by cmjulian » Thu Jul 15, 2010 1:43 pm
- 3 Replies
- 1084 Views
- Last post by cmjulian
Sat Jul 24, 2010 4:17 pm
-
- Resolution function...
by kodadimet » Fri Jul 16, 2010 9:48 am
- 1 Replies
- 862 Views
- Last post by tricky
Fri Jul 16, 2010 2:33 pm
-
- Procedure calls from other modules
by anthony » Thu Jun 17, 2010 10:20 pm
- 1 Replies
- 1089 Views
- Last post by tricky
Thu Jul 08, 2010 10:58 am
Return to Board index
