thank you for your help
in my vhdl code, I use this code in many place:
if tim=1 then
mptime<=12;
elsif (tim REM 4)=0 then
mptime<=mptime-1;
if tim=48 then
DC:='1';
DO:='0';
tim:=0;
end if;
end if;
tim:=tim+1;
can I use another way to replace it in order to use less GLB