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How do you assign bus pins when instanciating a device in the testbench?
I've tried the following and get syntax errors...

module selector_tb;
reg clock, in1[1:0];
wire out0, out1, out2, out3;

initial begin
$monitor("out0=%d",out0);
clock=0;
in1[1]=0; ***HAS NO PROBLEM WITH THESE***
in1[0]=0;
#20 in1[1]=1;
#20 in1[0]=1;
#20 in1[1]=0;
#20 $finish;
end
always begin
#10 clock=!clock;
end

selector1 U1 (
.in1[0] (in1[0]), ****Doesn't like this****
.in1[1] (in1[1]), ****And this*****
.clock (clock),
.out0 (out0)
);
endmodule

It doesn't like the following,

selector1 U1 (
.in1[0] (in1[0]), ****Doesn't like this****
.in1[1] (in1[1]), ****And this*****
.clock (clock),
.out0 (out0)
);

because you are connecting the ".in1" port individually. Try the following:

.in1 (in1), -- assuming both have same width

Good luck,

Linden