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Is that possible if I just store the PCM values in the memory block, and just make the FPGA to read and play back??

If so, what is the FPGA clock frequency we should set it to??

I edited the C++ code for ACM5. It will auto dump the HEX value of the PCM into a text file for me.

Sure that's possible, the problem is the amount of memory you need to do anything useful. Storing 1 second of PCM audio takes at least 8KB in "speech" quality (mono, 8KHz, 8 bits per samples).

Well. Thanks for the reply.

What I need to do is just playing a simple tone player.

In the current code, I don't even use a memory, but just hard code all the PCM data and send it to RxD_data, instate of getting it from the serial port.

reg [7:0] RxD_data_reg;
always @(posedge clk) RxD_data_reg <= RxD_data;

I tried to use a clock devider to make my global clock to a 11KHz. But, I can't get the correct sound I want from the speaker. May I know why??

Is that possible for me to get a simple sample code that just play a 2 sec PCM sound?

Hi,
I have a project with pwm and one bit dac. I have found the verilog codes on the website the code is below


module PWM(clk, RxD, PWM_out);
input clk, RxD;
output PWM_out;

wire RxD_data_ready;
wire [7:0] RxD_data;
async_receiver deserialer(.clk(clk), .RxD(RxD), .RxD_data_ready(RxD_data_ready), .RxD_data(RxD_data));

reg [7:0] RxD_data_reg;
always @(posedge clk) if(RxD_data_ready) RxD_data_reg <= RxD_data;

////////////////////////////////////////////////////////////////////////////
reg [8:0] PWM_accumulator;
always @(posedge clk) PWM_accumulator <= PWM_accumulator[7:0] + RxD_data_reg;

assign PWM_out = PWM_accumulator[8];
endmodule


but I can't find the async_receiver deserialer(.clk(clk), .RxD(RxD), .RxD_data_ready(RxD_data_ready), .RxD_data(RxD_data));

module description. is there anyone who helps me to write this module ?

thanks