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In some demo schematices, I see oscilator does not connect directily to fpga's clk pin.
The oscillator goes through a clock generator such as cy22393fc (cypress inc.), or through a FAST CMOS BUFFER/CLOCK DRIVER such as 49fct3805 (idt inc.) in altera's development kit.
I really confuse that can I directly connect oscilator to fpga, or I have to use some othe peripherial ICs.

Any one could help me out of this confusion?~~~

I really want to cop with this problem, becase this is the first barrier in front of my first prototype.

You can connect an oscillator directly to the FPGA clock pin provided the oscillator output is appropriate for the FPGA's clock input pin. Level, slew rate, duty cycle, etc.

Two oversimplified examples for NOT driving the FPGA pin directly:

A common reason for using a buffer is to isolate the oscillator from its load(s). Some oscillator components can be pulled off frequency if they must source too much current. Driving a single pin of an FPGA proably won't do it but running the clock to 10 loads might.

Clock generator chips can let you de-skew the clock edges, useful if you need to run the clock all over a board and the resulting trace begins looking like an poorly matched transmission line.

quite useful of your reply!

strengthen the loadability or deskew the rising/falling edge!

I will choose either chip or both if required.

Thanks!