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Hello, my name is Alveru.

I am a regular student of VHDL, I've been a programmer for several years but now I am trying to program in VHDL. Now, I am stock with a simple problem but seems, perhaps, that I won't solve never., I was trying to do the VGA examples in this page.

Can anyone tell me how the vhdl works with counters and comparators?
When I try to implement a counter with comparators the language seems to do everything but my intentions. Here is a sample of my short code.

---------------------------------------------------------------------------------
Port( ......
vga_HS : out std_logic;
......
);

....
....
....

signal Counter_HS : std_logic_vector (9 downto 0);
signal Counter_VS : std_logic_vector (8 downto 0);

Process(clock, reset)
Begin
if reset = '0' then
Counter_HS <= (others => '0');
elsif rising_edge(clock) then
Counter_HS <= Counter_HS + 1;
end if;
End Process;


Process(Counter_HS, reset)
Begin

if reset = '0' then
vga_HS <= '1';
elsif Counter_HS <= 15 then
vga_HS <= '0';
else
vga_HS <= '1';
end if;

End process;


-----------------------------------------------------------------------------

The problem here is that the counter simple doesn't count and comparator doesn't compare at all. With such a simple code I though it wouldn't be any problems but I was wrong. When I simulate the functionality of this code it works, but when I try to simulate in timing and with the real chip it craps!!!

I don't understand why this happens, the counter seems to count well but just the first 8 numbers but then it jumps from 8 to 25 and then to 33 then goes back again to 23 and so on, the comparator of course, with such a counter doesn't function properly. I've tryed to synchronize the output signal with the clock signal, but it fails again.

Could somebody please tell me how to deal with this problem, I don't understand the purpose of the commands if they don't do what they are suppose to do.

I hope someone can help me, I 'll go nuts if i can't find a solutions for this

Thank you.

Weird.
Maybe your timing simulation is too fast (i.e. the clock is too fast) and that's bad for the count. Try to slow down the clock, or try a functional simulation first.

Regarding the real chip - how are you generating the clock signal, what's its frequency, and how are you inspecting the counter outputs?

The counter code is pretty standard - I've used it with Spartan2 and Spartan3 chips using Webpack 6.

upss,

yes, as you suspected, the timing simulation was too fast

I was using a signal of 333.33 Mhz with a chip apex20K from altera

but it seems it was just to much for it.

I decreased the clock signal to 100 MHz and it did work


thanks.