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Dear all
In my spartan 3 (XC3S400) board i have a 50MHz clock that is connected to two clock pins (80 and 180). they are in different sides of the chip. i think by using this approach i can achive higher speed designs! now i want to know how to use this feature to define for ise that the two clocks are the same!
any ideas are welcome

Hi!

If you want to manage the clock - try using the DCM (Digital Clock Manager), available onchip. In ISE you don't need to point that the two pins are with a same clock. Just indicate in your UCF file which pin to what signal is connected - you can use one clock or both clocks depending on your needs. Having two clock sources you can have two clock domains in your FPGA.

Regards,
Yassen