does anyone know how to make a DDR2 SDRAM controller using the RTL of the MIG1.7 provided by xilinx.
or does anyone have a good controller that can be used i a smalle project?
I have the code for an SDRAM controller from Lattice. I don't know if now you can download it from Lattice's site, but some time ago they offer some cores open-source, like for PCI, SDRAM, I2C, Ethernet. Write me a mail to cod8114_at_yahoo.com and I will reply you with sources attached.