I got here a few Notebook LCD's, with LVDS Video interface.
The datasheet of all of then say the same thing, so its the same control for all.
I am using an Development Board with Xilinx Spartan 3A ( http://www.xilinx.com/products/devkits/aes_sp3a_eval400_avnet.htm )
and I have a 16MHz clock to run the schematics.
I got too, the XAPP486 Xilinx Serializer (7:1 4 channels), and I got too a Optrex Document about LVDS displays (the signalling is the same of my LCD, but its more detailed at optrex document: http://www.optrex.com/SiteImages/PartList/SPEC/121_T-55592D121J-LW-A-AAN_100621.pdf)
I moded the XAPP486 in two thing. They are for LVDS_25 and the LCD's are LVDS_33, and the XAPP486 is made for operate direct at FPGA pins, so it has many buffers and Verilog Compiler doesnt like the DCM to have much buffers, so I removed then and made the correct adaptations.
Ok, so I made the solderings, and the Verilog Code:
- Code: Select all
module main(
input clk,
output [3:0] dataouta_p,
output [3:0] dataouta_n,
output clkouta1_p,
output clkouta1_n,
input button1,
input button2,
input button3
);
wire cld,clk2x,clo,clk4x;
DCM_SP #(
.CLKIN_PERIOD ("62.5"),
.CLKFX_MULTIPLY (2)
)
dcm_clk (
.CLKIN (clk),
.CLKFB (clo),
.RST (1'b0),
.CLK0 (clk2x),
.CLKFX (clk4x),
.LOCKED (clk_lckd)
);
defparam dcm_clk.CLKIN_PERIOD = 62.5;
defparam dcm_clk.CLKFX_MULTIPLY = 2;
reg [3:0] ContadorGray = 0;
always @(posedge clk4x)
begin
if(ContadorGray == 15)
ContadorGray <= 0;
else
ContadorGray <= ContadorGray +1;
end
wire [27:0] lcddata;
top4_tx serializador (
.clkint(clk4x),
.datain(lcddata),
.rstin(1'b1),
.dataouta_p(dataouta_p),
.dataouta_n(dataouta_n),
.clkouta1_p(clkouta1_p),
.clkouta1_n(clkouta1_n)
);
wire high;
wire low;
assign low = 1'b0 ;
assign high = 1'b1 ;
//assign lcddata = 28'b111111111111111111111111111;
//assign lcddata = {ContadorGray, high, high, ContadorGray, high, high, ContadorGray, high, high, ContadorX, ContadorY, high};
//assign lcddata [27:7] = { high, high, high, low, low, ContadorGray, low, low, ContadorGray, low, low, ContadorGray };
assign lcddata [20:0] = { high, high, high, low, low, ContadorGray, low, low, ContadorGray, low, low, ContadorGray };
assign lcddata [27:20] = 7'b1111111;
endmodule
Tested the waveform:
And its working. But when I plug the LCD, nothing happens at LCD. Tryed two different LCD's, but nothing happen.
I am confused with LVDS Video Interface. In this site:
http://michaldemin.wordpress.com/2010/1 ... n/#more-49
I see that LVDS Panels doesnt have Hsync and Vsync. On the Optrex Datasheet, it says too, but on the LVDS Video Controller Datasheet described on that site it has the Hsync and Vsync signals.
I tryed both things, but none of them work.
Someone has already worked with LVDS Panels?
Thanks!
Few pics of that project:
http://www.energylabs.com.br/project/?dir=EnergyLabs/FPGA/TFT%20LCD