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Jean, I tried sending this direct to your email address but it bounced (Blacklisted by blackholes.five-ten-sg.com) so I'll just post it here.

Just a comment about the Dragon PCI interface. I think the package would really be much improved with the addition of interrupt capability. I know this is a lot of extra work, but it seems that you can't really get the low latency without it. In my application I had to go to DOS and polling to work around the lack of an interrupt. Perhaps I'm missing something, but I don't know how you could get rapid response to PCI events under XP with out an interrupt. At the very least it seems on the next board lay out that the PCI INTA# line should be connected to a free FPGA pin.

Thanks,
-Reed

Yes, it's not that you can't use INTA#, but you have to solder a 1" wire on the back of the board to use it. I kind of run out of pins on this side of the board, so I made INTA# optional...

The wire needs to go from the INTA# pad (PCI S6) to any free pin on the FlashyD connector.

On my rev. C board there is no pad or trace so you have to solder directly to the edge connector finger. It would be nice to have a pad or better a feed through (via) to make the connection to.

Do you have any example verilog code for the INTA line? I'm wondering about the configuration space specifically. If you have any good pointers to that explain how to implement the interrupt in the PCI config. space that would be very helpful also.

Thanks,
-Reed

Yes, I added the pad on rev. D, but on rev. C, you solder the wire on the PCI finger.

I don't have an example. I guess you have to modify the conf space, and update the P&P driver to support the interrupt.