Can the 10BASE-T FPGA interface part 0 run?
it is complete code that we demonstrate how to send Ethernet traffic directly from an FPGA to a PC??
thank!!
if i have a 50MHz clock available on my FPGA board,that it is OK?
do i need change the code?
and if it need change the verilog code,can tell me that how do i do??
beacuse i don't understand for the clock(what is it?).........
thank you!!!