Hi Jean,
I just read your homepage about oversampling to do Manchester decoding and one question arised I couldn't find an answer.
If I get this Manchester coded data stream into my FPGA: ...000000000000100110011001... (these should be the transitions of the signal)
How do I find out if I am in the middle of the first bit? E.g. is this partitioning correct (...00000000000 01 00110011001...) or this one (...000000000000 10 0110011001...) for the first bit?
DAMC